Verifying a Vci Bus Interface Model Using an Lsc-based Specification

Because of the high stakes involved in integrating externally developed intellectual property (IP) cores used in System on Chip (SOC) designs, methods and tool support for quick, easy, decisive standard compliance verification must be developed. Such methods and tools include formal standard specifications that are easy to read, formal definitions of standard compliance and automatic generation of model checking assertions which together imply compliance. We compare two efforts in verifying that the same register transfer level (RTL) code complies with the Virtual Component Interface (VCI) Standard. In so doing, we show that using Live Sequence Charts (LSCs) as a formal notation for protocol specification has potential to aid automatic protocol compliance verification.